CC- Debugger connected to the SoC device

Minimum connection used to debug download

For a TI 8051-based RF SoC, debugging data connection (DD) line, debug clock (DC) line and the reset signal RST line to the device. Note that, DD is a bidirectional signal. In addition, Target and GND must be connected to the target board. Target as input, with the CC Debugger level shifter, thereby allowing the target in addition to the inner portion of the debugger different operating voltages.

For CC111x, CC251x, CC243x, CC253x and CC254x, except CC2544 and CC2545, connection DD and DC signal pins P2.1 pin P2.2. For the CC2544's DD and DC signals are c onnected to P1.3 to P1.2. For the CC2545's DD and DC signals are connected to P1.3 to P1.4. Note that you can connect 3.3 V signal is connected to the target board power supply from the debugger and the target board via pin 9。

Note

1. Some early SoCs (CC2430, CC2510 and CC1110) requires an external pullup resistor.All new SoC chip has been integrated in the P2.2 pin of the pull, so the external pullup resistor is not needed.

2. TI recommends connecting RC filter circuit on the RESET, thus increasing the reliability of the system, in fact, can also be directly connected to RESET.

SmartRF Studio protocol analysis using the minimum connection

Use with minimum connection used to debug download the same connection.

SmartRF Packet Sniffer protocol analysis using the minimum connection

In order to use CC Debugger protocol analysis, you need to connect the rest of the SPI interface. SPI interface is used to read Take the captured RF packets.

Note

1. Use PacketSniffer function will overwrite the original program in the chip.

2. SPI interface Cautions：TI all current SoCs can be configured as SPI slave mode, packetsniffer firmware configures the SoC. Used with CC-Debugger communications protocol analyzer is used in the following diagram port configuration.。

All current TI's RF SOC can be configured to operate as a slave SPI, SPI signals (CS, SCLK, MISO and MOSI) with one USART interface as the data output. SmartRF Packet Sniffer would firmware programmed into the chip, the firmware will choose which one to go according to the SPI serial peripheral PIN pin as an output connection. The firmware can use any of the four pin configuration (USART0 or a pin output substitute 1 or 2). However, at the same time can only use one (see table below).

If you support multiple interfaces, SmartRF Packet Sniffer allows you to choose which interface to use.。